Over two decades of Enabling Compact Modeling R&D Exchange

Compact Modeling Calendar

Announcements: IWCM Jan. 30, 2012 Sydney, AU call for papers MOS-AK/GSA India March 16-17, 2012 MOS-AK/GSA Dresden April 26-27, 2012 MIXDES Special Modeling Sesion May 24-26 2012, Warsaw, PL MOS-AK/GSA ESSDERC/ESSCIRC Sept. 21, 2012 Bourdeaux, F MOS-AK/GSA Q4 San Francisco, CA Past Events: Nano-Tera BSIM EKV Workshop MOS-AK/GSA  Washington DC, Dec.7, 2011 MOS-AK/GSA ESSDERC/ESSCIRC, Helsinki SISPAD 2011 Compact Modeling Workshop Sept. 7, Osaka MIXDES Special CM Session, Gliwice, June 2011 Spring MOS-AK/GSA Workshop, Paris, April 7-8, 2011 IWCM (Co-located with ASP-DAC), Yokohama, Jan. 25, 2011

Modeling Events

MOS-AK/ESSDERC/ESSCIRC CM Workshops	MOS-AK International CM Meetings		MIXDES Special CM Sessions
21 Sept. 2012, Bordeaux 16 Sept. 2011, Helsinki 17 Sept. 2010, Seville 18 Sept. 2009, Athens 19 Sept. 2008, Edinburgh 14 Sept. 2007, Munich 22 Sept. 2006, Montreux 16 Sept. 2005, Grenoble 20 Sept. 2004, Leuven 19 Sept. 2003, Estoril	Q2 2012, Dresden 16-17 March 2012, India 7 Dec. 2011, Washington DC  7-8 April 2011, Paris 8 Dec. 2010, California 8-9 April 2010, Rome 9 Dec. 2009, Baltimore 2-3 April 2009, Frankfurt(O) 13 Dec. 2008, San Francisco 4 April 2008, Eindhoven	20 March 2007, Premstaetten 24 March 2006, Boeblingen 8 April 2005, Strasbourg 7 May 2004, Stuttgart 5 May 2003, Crolles 21 Oct.2002, Erfurt 20 June 2002, Wroclaw 19 Nov. 2001, Premstaetten  5 Mar. 2001, Munich 26 May 2000, Lausanne 26 Nov. 1999, Dresden	Warsaw'12 Glivice'11 Wroclaw'10 Łódź'09 Poznan'08 Ciechocinek'07 Gdynia'06 Kraków'05 Szczecin'04 Łódź'03 Wrocław'02 Zakopane'01

Modeling Links

MOS-AK/GSA Mission Statement Extended MOS-AK/GSA Committee MOS-AK/GSA Compact Modeling Books Publication Partners of the MOS-AK Group Microelectronics Journal Bernard Courtois, Editor-in-Chief International Journal of Numerical Modelling (IJNM) Phil Mawby; Editor, Europe IEEE CS (TTTC) Radioelectronics & Informatics Vladimir Hahanov; Editor, Europe GSA:  Mixed-Signal/RF Subcommittee Mixed-Signal/RF SPICE Model Checklist Modeling & Design - Blogs and Calendars: ElektronikPraxis Sedemos Blog Semiwiki FEUP Microelectronics Students’ Group International NanoScience Community IET: The Institution of Engineering and Technology AKB: Arbeitskreis Bipolar (Working Group Bipolar) contact: Joerg Berkner (Meeting photo album) VBIC: Vertical Bipolar Intercompany Model Analog Skills Initiative Designer's Guide CEI-Europe Compact Modeling Council Timeline for MG CM Standardization EDA Industry Working Groups EDACentrum (DE) Eurotraining and Europractice European Technology Platforms (ETPs) IDESA - Advanced IC-design training IEEE EDS Compact Modeling Technical Committee gEDA project: GPL'd suite/toolkit for EDA London Metropolitan University Communications Technology Research Centre MEAD Education Microswiss Network (CH) National Microelectronics Institute (UK and Ireland) NMI Design Innovation swissT.net: Swiss Technology Network

Compact Models Standardization Initiative: COMON: European Network on Compact Modeling contact Benjamin Iniguez ADMS  XML Verilog-A interface for Avospice, Ngspice, Qucs, Smash, ZSPICE contact: Laurent Lemaitre Paragon: developed at MSCAD Lab Model creation demo using Paragon v1.1 ModLyng™ Integrated Development Environment ngspice mixed mode/level circuit simulator contact: Paolo Nenzi QUCS Quite Universal Circuit Simulator contact: S. Jahn and M. Brinson Tiburon Verilog-A compiler for analog simulators  contact: Marek Mierzwinski Smash: mixed-signal multi-language simulator  Verilog-A CM White Paper contact: Gilles Depeyrot SimCAS Symbolic electronic simulator contact: Cyril Collineau VHDL-AMS at InESS - ENSPS contact: Ch. Lallement and F. Pregaldiny CAD, Test and Measurement Accelicon  MBP, MQA selected by STARC AIM-Extract contact: AIM-Software Angelov FETmodel at Uni.Chalmers contact Prof. I. Angelov GigaHertz Centre contact: Jan Grahn, Centre Director MOSTXX application for MOSFET extractions contact: Daniel Tomaszewski, ITE Warsaw Large-Signal Network Analyzer Technology contact: Marc Vanden Bossche, NMDG Time Domain Loadpull Solutions contact: Jan Verspecht, VTD-FR TCAD Central: Community Portal contact: Juan Sanchez Microwind for designing and simulating microelectronic circuits at layout level. contact: Etienne Sicard  MiPlaza contact: Mark de Haas Predictive Technology Model (PTM) contact: Yu (Kevin) Cao

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update: Dec. 2011 (rev.A)

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