Arbeitskreis MOS-Modelle und Parameterextraktion
MOS Modeling and Parameter Extraction Working Group
MOS-AK Meeting
Friday, 4 April 2008 at MiPlaza, High Tech Campus Eindhoven
Sponsors of the MOS-AK Meeting
MiPlaza
Agilent
Cascade
Technical Program Promoters
EuroTraining FSA 
ijnm_wiley RI_Journal
Agenda: Friday, 4 April 2008 at MiPlaza, High Tech Campus Eindhoven
Workshop Chair: Thomas Gneiting
Technical Program Coordinator: W.Grabinski
  • Morning Session
    • 9:00-11:00 Oral presentations
    • 10:00-10:30 (coffee break)
  • Poster Session
    • 11:30-12:00 Posters
    • 12:00-13:00 (lunch)
  • Afternoon Session
    • 13:00-16:00 Oral presentations
    • 14:30-15:00 (coffee break)
Poster Session Program
Display Format: Citation Citation & Abstract
11:30 Poster Session Briefing
  Enabling High Certainty 1/f Measurements at Higher Corner Frequencies
Anthony Lord (Cascade Microtech Europe Ltd)
  Next-Generation Device-Level Model Extraction and Generation Solutions
Tim K. Smith and James Ashforth-Pook (Accelicon Technologies)
  LDMOS modeling in HV-CMOS Technology
Ehrenfried Seebacher, Werner Posch, Biswanath Senapati, Kund Molnar and  Alexander Steinmair (austriamicrosystems)
  Compact Small-Signal Modelling of Multiple-Gate Mosfets up to RF Operation
Benjamin Ińiguez*, Antonio Lázaro*, Oana Moldovan*, Bogdan Nae* and Hamdy A. Hamid**; (*Uni Tarragona, **Uni Ontario)
  Compact Modeling of Nanoscale Multiple-Gate FETs
Alexander Kloes*, Michaela Weidemann* ** (*Uni.Giessen-Friedberg, **Uni.Tarragona)
  Design-oriented Compact Model for FinFET
Mingchun Tang*, Fabien Prégaldiny*, Christophe Lallement*, Jean-Michel Sallese** and François Krummenacher* (*InESS /ENSPS, *EPFL/IMM)
  A CMOS Technology and its Characterization in ITE
Tomasz Bieniek*, Krzysztof Kucharski*, Lidia Lukasiak**, Arkadiusz Malinowski*, Dariusz Obrebski* and Daniel Tomaszewski* (*ITE Warsaw **IMIO PW)
  Self-consistent 2D modeling of Short-channel Nanoscale DG and GAA MOSFETs
H. Břrli and T.A. Fjeldly (UNIK)
  Fully Automatic Extraction of OTFT Transistor Parameters Using Improved Genetic Algortihms
M.A. Calafat*,**, R. Picos*, M. Fernandez**, M. Roca*, B. Iniguez***, E. Garcia-Moreno* (*GTE Universitat Illes Balears, **Universidad de Oviedo ***DEEEA Universitat Rovira i Virgili )
  Accurate FinFET Modeling at High Temperatures
A. Cerdeira*, M. Estrada*, J. Alvarado*, V. Kilchytska** and D. Flandre* (*CINVESTAV, **CUL)
  RF Extraction Techniques for Series Resistances of MOSFETs: Major Concerns
J. C. Tinoco and J.-P. Raskin (UCL)
12:00 End of the Poster Session
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update:  12-April-08 (rev.d)
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