Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
  2nd MOS-AK/India Workshop
IIT Hyderabad, February 25-27, 2019
Open Directory
MOS-AK: Enabling Compact Modeling R&D Exchange
Technical MOS-AK Program Promoters
IIT Hyderabad
Workshop Host
Swissnex India
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Preannouncement and Call for Papers
Important Dates:
  • Call for Papers - Sept. 2018
  • 2nd Announcement - Nov. 2018
  • Final Workshop Program - Jan. 2019
  • MOS-AK pre-Event Hyderabad
    • Aug. 31 and Sept. 1, 2018
  • MOS-AK pre-Event Bangalore
    • Sept. 2018
  • MOS-AK Compact Modeling Workshop - February 25-27, 2019
    • One day SPICE/Verilog-A Modeling Tutorials
    • Two days SPICE/Verilog-A Modeling Workshop
IIT Hyderabad
registration (to be open in Sept.2018; any related enquiries can be sent to
   Synopsis and Workshop Topics
  • HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models.
  • MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulation.
  • The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.
Topics: to be covered include the following:
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • FOSS TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, TFT CMOS and SOI-based memory cells
  • Organic, Bio/Med devices/technology modeling
  • Microwave, RF device modeling, HV/Power device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D reliability/ageing, DFY, DFT and IC Designs
  • Foundry/Fabless Interface Strategies
Abstract Submission (to be open in Sept.2018 any related enquiries can be sent to

International MOS-AK Committee:
  • International Advisory Committee
    • M.K. Radhakrishnan, Chair, R10 EDS
    • Ehrenfried Seebacher, ams (A) 
  • National Advisory Committee
    • A.B. Bhattacharyya, FNA,FNAE
    • U.B. Desai, Director, IITH
    • Ramgopal Rao, IITD
    • Navkanth Bhat, IISc
    • Manoj Saxena, EDS
    • PVS Maruthi Rao, IEEE Hyderabad Section
    • V. Hanuma Sai, AMS Semiconductors Pvt. Ltd. 
  • General Co-Chairs
    • PA Govindacharyulu, IEEE CAS/EDS, Hyderabad Section
    • Wladek Grabinski, MOS-AK (EU)
  • Organizing Co-Chairs
    • Sushmee Badhulika, IITH
    • A.G. Krishnakanth, AMS Semiconductors Pvt. Ltd.
  • TPC Co-Chairs
    • PV Anand Mohan, IEEE CAS, Bangalore Section
    • N Venkatesh, Redpine Signals
  • Publication Co-Chairs
    • Asudeb Dutta, IITH
    • Wladek Grabinski, MOS-AK (EU)  
  • Finance Co-Chairs
    • Arif Sohel, IEEE CAS/EDS, Hyderabad Section
  • Tutorial Co-Chairs
    • Kaleem Fatima, IEEE CAS/EDS, Hyderabad Section
    • Sabat L Samrat, University of Hyderabad
  • Publicity Co-Chairs
    • Anurag Mangla, ams (A)
    • P. Chandrasekhar, IEEE CAS/EDS, Hyderabad Section
  • Sponsorship Co-Chairs
  • Exhibition Co-Chairs
  • Industry Liaison Co-Chair
    • Vijaya Shankar Rao, University of Hyderabad
  • Local Arrangement Co-Chair
    • M.A. Raheem, IEEE CAS/EDS, Hyderabad Section
  • MOS-AK Technical Committee
    MOS-AK North America
  • Chair: Pekka Ojala, Exar Corporation
  • Co-Chair: Geoffrey Coram, Analog Devices
  • Co-Chair: Prof. Jamal Deen, U.McMaster
  • Co-Chair: Roberto Tinti, Keysight EEsof Division
    MOS-AK South America
  • Chair: Prof. Gilson I Wirth; UFRGS; Brazil
  • Co-Chair: Prof. Carlos Galup-Montoro, UFSC; Brazil
  • Co-Chair: Sergio Bampi, UFRGS, Brazil
  • Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN, Mexico
    MOS-AK Europe
  • Chair: Ehrenfried Seebacher, AMS, Austria
  • Co-Chair: Suba Subramaniam, XFab, XFab, Germany
  • Co-Chair: Prof. Benjamin Iniguez, URV, Spain
  • Co-Chair: Franz Sischka, SisConsult, Germany
    MOS-AK Asia/South Pacific

  • Chair: Sadayuki Yoshitomi, Toshiba (J)
  • Co-Chair: A.B. Bhattacharyya, JIIT New Delhi (IN)
  • Co-Chair: Min Zhang, XMOD Technologies, (CN)
  • Co-Chair: Kaikai Xu, 电子科技大学 (CN)  
  • Co-Chair: Xing Zhou, NTU Singapore (SG)  
update: May 2018 (rev. A)
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