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ACM Advanced Compact MOSFET
  The ACM (Advanced Compact MOSFET) model is a charge-based physical model. All the large-signal characteristics (currents and charges) and the small-signal parameters transconductances and transcapacitances are given by single-piece expressions with infinite order of continuity for all regions of operation.
Web
http://eel.ufsc.br/~lci/acm/introduction.html
Code
http://eel.ufsc.br/~lci/acm/download.html
Verilog-A
No
Simulator
other
References
[1] C. Galup-Montoro and M. C. Schneider, MOSFET Modeling for Circuit Analysis and Design, World Scientific, Singapore, 2007.
Angelov GaAs industry-standard compact device model for GaAs transistors
  A general purpose large-signal modeling approach with the Verilog-A implemented in CAD tools and experimentally evaluated. Models show good accuracy and stable behavior also for HB simulations.
Web
https://document.chalmers.se/workspaces/chalmers/mikroteknologi-och/iltcho-angelowdocuments/ openfolder
Code
http://www.tiburon-da.com/design_kits/Angelov_DK_v1_12_OA.zip
Verilog-A
Yes
Simulator
ADS
References
Ilcho Angelov, Roberto Tinti; Accurate Modeling of GaAs & GaN HEMT's for Nonlinear Applications; EDA Webcast, May 7 2013
Angelov GaN industry-standard compact device model for GaN transistors
  Angelov-GaN is an industry-standard compact device model for GaN semiconductor devices. Since GaN devices typically operate at high power, it is important to be able to model thermal issues and their impacts on device characteristics. Prof. I. Angelov at Chalmers University of Technology developed his Angelov-GaN model as an alternative.
Web
Code
http://www.tiburon-da.com/design_kits/Angelov_DK_v1_12_OA.zip
Verilog-A
Yes
Simulator
ADS
References
Ilcho Angelov; Compact, Equivalent Circuit Models for GaN, SiC, GaAs and CMOS FET; MOS-AK/GSA Workshop Dec.9, 2009 Baltimore
BSIM6 Berkeley Short-channel IGFET Model
  BSIM6 is the new Bulk MOSFET model from the BSIM Group. The model provides excellent accuracy compared to measured data in all regions of operation. It features model symmetry valued for analog and RF applications while maintaining the strong support and performance of the BSIM model valued for all applications since 1996. The model has been extensively tested by TechAmerica Compact Model Council (CMC) member companies to meet the needs of industrial users. CMC has approved the release of BSIM6.0.0 as an industry-standard MOSFET model.
Web
http://www-device.eecs.berkeley.edu/bsim/?page=BSIM6
Code
http://www-device.eecs.berkeley.edu/bsim/static.php?page=BSIM6_LR
Verilog-A
Yes
Simulator
other
References
[1] Recent Enhancements in BSIM6 Bulk MOSFET Model; H.Agarwal (IIT Kanpur), S. Venugopalany, M.-A. Chalkiadakia, N.Paydavosi, J. P. Duarte, S. Agnihotri, C. Yadav, and P. Kushwaha, Y. S. Chauhan (IIT Kanpur), and C. Enz, A. Niknejd, and C. Hu; SISPAD 2013, Glasgow UK
EKV 2.6 EKV Compact MOSFET Model Standard for Analog/RF IC Designs
  An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
Web
http://ekv.epfl.ch
Code
http://ekv.epfl.ch/contact_us
Verilog-A
Yes
Simulator
ngspice
References
[1] C. Enz, F. Krummenacher, E. Vittoz, 'An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications', Journal on Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers, pp. 83-114, July 1995
[2] M. Bucher, 'Analytical MOS Transistor Modelling for Analog Circuit Simulation', Ph.D. Thesis No. 2114 (1999), Swiss Federal Institute of Technology, Lausanne (EPFL).
HICUM HIgh CUrrent Model
  HICUM stands for HIgh CUrrent Model and targets the design of bipolar transistor circuits at high-frequencies and high-current densities using Si, SiGe or III-V based processes. HICUM is being developed and maintained by the HICUM Group at CEDIC, University of Technology Dresden, Germany, and the University of California at San Diego, USA. Presently three hierarchy (levels) of HICUM models (e.g., Level0, Level2 and Level4) exist differing by model complexity and each targeting a different design purpose.
Web
http://www.iee.et.tu-dresden.de/iee/eb/hic_new/hic_intro.html
Code
http://www.iee.et.tu-dresden.de/iee/eb/hic_new/hic_source.html
Verilog-A
Yes
Simulator
other
References
[1] M. Schröter, A. Chakravorty "Compact Hierarchical Bipolar Transistor Modeling with HiCUM" 752pp; Nov 2010 ISBN: 978-981-4273-21-3 (hardcover)
HiSIM2 Surface-Potential-Based RF MOSFET Model for Circuit Simulation
  Standardization of HiSIM2 and release of HiSIM251 as 1st standard version on April 2011 
Web
http://www.hisim.hiroshima-u.ac.jp/
Code
http://home.hiroshima-u.ac.jp/usdl/HiSIM2/HiSIM2_pub.html
Verilog-A
Yes
Simulator
other
References
[1] Mitiko Miura-Mattausch; Hans Jürgen Mattausch; Tatsuya Ezaki; The physics and modeling of MOSFETS: surface-potential model HiSIM; New Jersey; World Scientific, cop. 2008
[2] N. Sadachika, S. Mimura, A. Yumisaki, K. Johguchi, A. Kaya, M. Miura-Mattausch, and H. J. Mattausch, "Prediction of Circuit-Performance Variations from Technology Variations for Reliable sub-100nm SOC Circuit Design", IEICE Trans. on Electronics, Vol. E94-C, No. 3, 361-367 (2011.3)
MASTAR Model for Analog and digital Simulation of mos TrAnsistoRs
  In order for a model to be suitable for analog circuit simulation, a good accuracy and continuity in current and its derivatives in all operation regimes are required. As demonstrated in this paper. The MASTAR (Model for Analog and digital Simulation of mos TrAnsistoRs) perfectly satisfies these requirements. The gain in circuit CAD accuracy when using MASTAR as opposed to a conventional digital model is also demonstrated by comparison with data measured on test circuits. ITs validity has been confirmed on 4 generations of CMOS technologies
Web
Code
Verilog-A
No
Simulator
other
References
[1] Skotnicki, T.; Denat, C.; Senn, P.; Merckel, G.; Hennion, B., "A new analog/digital CAD model for sub-halfmicron MOSFETs," Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International , vol., no., pp.165,168, 11-14 Dec. 1994
Materka GaAs FET Model
  A simple and efficient model for GaAs FET amplifier analysis. The FET is represented by its circuit-type nonlinear dynamic model taking into account the device's main nonlinear effects including gate-drain voltage breakdown.
Web
Code
Verilog-A
No
Simulator
other
References
Materka, A.; Kacprzak, T., "Computer Calculation of Large-Signal GaAs FET Amplifier Characteristics," Microwave Theory and Techniques, IEEE Transactions on , vol.33, no.2, pp.129,135, Feb 1985
MEMS Switch large-signal model for a ohmic cantilever RF MEMS switch
  The Verilog-A large signal model can be used for operating point, small signal (AC, SP) and large signal (HB, PSS, QPSS) simulations, using ADS, SpectreRF or Qucs. It includes large-signal electromechanical effects, as well as small-signal Brownian and Johnson-Nyquist noise. It does not include electro-thermal effects yet.
Web
http://www-personal.umich.edu/~vcaeken
Code
http://www.designers-guide.org/VerilogAMS/mems-models/OHMIC_CANTILEVER_RF_MEMS_SWITCH.va
Verilog-A
Yes
Simulator
other
References
[1] K. Van Caekenberghe, "Modeling RF MEMS Devices", IEEE Microwave Magazine, vol. 13, no. 1, pp. 83-110, Jan.-Feb. 2012
MEXTRAM compact model for bipolar transistors
  Mextram is a compact model for bipolar transistors: it supports the design of bipolar transistor circuits in silicon (Si) and silicon-germanium (SiGe) based process technologies. Mextram is developed and supported at Delft University of Technology. Mextram has been selected by the Compact Model Council (CMC) as a world standard bipolar transistor compact model for the semiconductor industry.
Web
http://mextram.ewi.tudelft.nl/
Code
http://mextram.ewi.tudelft.nl/page_Releases.504.php
Verilog-A
Yes
Simulator
other
References
[1] "Mextram" by R. van der Toorn, J.C.J. Paasschens, W.J. Kloosterman and H.C. de Graaff; Chapter 7 (pp. 199 - 227) of: Compact Modeling, Principles, Techniques and Applications, Gildenblat, Gennady (ed.), Springer, New-York, 2010.
MISNAN Physically Based Continuous MOSFET Model for CAD Applications
  The model has been used extensively at Northern Telecom and BNR for purposes of analog and digital circuit simulation; because of the continuity of modeling through the threshold condition, it is particularly appropriate for application in analog circuit simulation. As implemented, the model was an independent Fortran subroutine interfaced with circuit simulator SCAMPER.
Web
Code
Verilog-A
No
Simulator
other
References
[1] Boothroyd, A. R.; Taraswicz, S.W.; Slaby, C., "MISNAN-a physically based continuous MOSFET model for CAD applications," Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on , vol.10, no.12, pp.1512,1529, Dec 1991
PSP Compact Model for bulk Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET's)
  PSP is a surface-potential based MOS Model, containing all relevant physical effects (mobility reduction, velocity saturation, DIBL, gate current, lateral doping gradient effects, STI stress, etc.) to model present-day and upcoming deep-submicron bulk CMOS technologies. PSP not only gives an accurate description of currents, charges, and their first order derivatives (i.e. transconductance, conductance and capacitances), but also of the higher order derivatives, resulting in an accurate description of electrical distortion behavior. The latter is especially important for analog and RF circuit design. The model furthermore gives an accurate description of the noise behavior of MOSFETs. Finally, PSP has an option for simulation of non-quasi-static (NQS) effects.
Web
http://psp.ewi.tudelft.nl/
Code
http://psp.ewi.tudelft.nl/page_Releases.103.php
Verilog-A
Yes
Simulator
other
References
[1] Surface-Potential-Based Compact Model of Bulk MOSFET by Gennady Gildenblat, Weimin Wu, Xin Li, Ronald van Langevelde, Andries J. Scholten, Geert D.J. Smit and Dirk B.M. Klaassen. Chapter 1 (pp. 3 - 40) of: Compact Modeling, Principles, Techniques and Applications, Gildenblat, Gennady (ed.), Springer, New-York, 2010.
VBIC Vertical Bipolar Intercompany Model
  VBIC is a bipolar junction transistor (BJT) model that was developed as a public domain replacement for the SPICE Gummel-Poon (SGP) model. VBIC is designed to be as similar as possible to the SGP model, yet overcomes its major deficiencies. VBIC improvements on SGP: Improved Early effect modeling; Quasi-saturation modeling; Parasitic substrate transistor modeling; Parasitic fixed (oxide) capacitance modeling; Includes an avalanche multiplication model; Improved temperature modeling; Base current is decoupled from collector current; Electrothermal modeling; Smooth, continuous model.
Web
http://www.designers-guide.org/VBIC/
Code
http://www.designers-guide.org/VBIC/downloads.html
Verilog-A
Yes
Simulator
other
References
[1] Mcandrew, C.C.; Seitchik, J.A.; Bowers, Derek F.; Dunn, M.; Foisy, M.; Getreu, Ian; McSwain, M.; Moinian, S.; Parker, J.; Roulston, D.J.; Schroter, M.; Van Wijnen, P.; Wagner, L.F., "VBIC95, the vertical bipolar inter-company model," Solid-State Circuits, IEEE Journal of , vol.31, no.10, pp.1476,1483, Oct 1996

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  update: July 2012 (rev.a)
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