| Register: |
Free on-line registration
will be available thru the ESSDERC/ESCIRC web site |
| Venue: |
Barceló
Renacimiento Hotel Seville |
| Agenda: |
- Sept. 17, 2010
- MOS-AK/GSA ESSDERC/ESSCIRC
Workshop
- "Frontiers
of the Compact Modeling for Advanced Analog/RF Applications"
|
| Important Dates: |
- 2nd Announcement
- June. 2010
- Final Workshop Program -
Aug. 2010
- MOS-AK/GSA Workshop
- Sept.17, 2010
|
| Synopsis: |
- HiTech forum to discuss
the frontiers of electron device modeling with emphasis on
simulation-aware models.
- MOS-AK/GSA
Meetings are organized with aims to strengthen a network and discussion
forum among experts in the field, enhance open platform for information
exchange related to compact/Spice modeling and Verilog-A
standardization,
bring people in the compact modeling field together, as well as obtain
feedback from technology developers, circuit designers, and CAD tool
vendors. The topics cover all important aspects of compact model
development, implementation, deployment and standardization within the
main theme - frontiers of the compact modeling for nm-scale MEMS
designs and CMOS/SOI circuit simulation.
- The
specific workshop goal will be to classify the most important
directions for the future development of the electron device models,
not limiting the discussion to compact models, but including physical,
analytical and numerical models, to clearly identify areas that need
further research and possible contact points between the different
modeling domains.
This workshop is designed for device process engineers (CMOS, SOI,
BiCMOS, SiGe) who are interested in device modeling; ICs designers
(RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as
device characterization, modeling and parameter extraction engineers.
The content will be beneficial for anyone who needs to learn what is
really behind the IC simulation in modern device models.
|
| Topics: |
to be covered include the
following:
- Compact Modeling (CM) of
the electron devices
- Verilog-A language for
CM standardization
- New CM techniques and
extraction software
- CM of passive, active,
sensors and actuators
- Emerging Devices, CMOS
and SOI-based memory cells
- Microwave, RF device
modeling, high voltage device modeling
- Nanoscale CMOS devices
and circuits
- Technology R&D,
DFY, DFT and IC Designs
- Foundry/Fabless
Interface Strategies
|
| Speakers: |
tentative list of the
invited speakers (alphabetic order):
- Raphael Clerc, MINATEC:
Compact modeling of nanoscale MOSFETs: beyond the drift diffusion
approximation
- Gilles Depeyrot, Dolphin
Integration: Verilog-A Compact Model Standardization
- Tibor Grasser, TU
Wien: Recent
Developments in Device Reliability Modeling
- Benjamin Iniguez, URV:
Advances in Multigate MOSFET Modeling
- David Jimenez,
UAB: Analytic
surface potential and drain current model for negative capacitance FETs
- Bernabé
Linares-Barranco, NMC: The EKV/ACM compact models for mismatch modeling down to 90nm and for new emergent non-CMOS nanotechnology FETs
- Andrzej J. Strojwas, PDF Solutions:Challenges in Modeling Layout Systematic Effects in Compact Device Models
- Josef Watts, IBM: Modeling Standardization:
Enabling the worldwide design community
- Sadayuki Yoshitomi, Toshiba: Device Level RF IC Desing
|
| On-line |
abstract submission is open |
| Committees: |
Local Organizing Committee:
- Andres Godoy, UGR
- Benjamin Inigues, URV
- Rodrigo Picos, UIB
Extended
MOS-AK/GSA
Committee:
- Lisa Tafoya, Vice President, Global Semiconductor
Alliance (GSA)
- Chelsea Boone GSA; Senior Research Analyst
- Wladek Grabinski, GMC Suisse; MOS-AK/GSA Group
Manager
MOS-AK/GSA North America:
- Chair: Pekka Ojala, Exar Corporation
- Co-Chair: Geoffrey Coram, Analog Devices
- Co-Chair: Prof.
Jamal Deen,
U.McMaster
MOS-AK/GSA South America:
- Chair: Prof. Gilson I Wirth; UFRGS; Brazil
- Co-Chair: Prof. Carlos Galup-Montor, UFSC; Brazil
MOS-AK/GSA Europe:
- Chair: Ehrenfried Seebacher, austriamicrosystems AG
- Co-Chair: Sebastian Schmidt, XFab
- Co-Chair: Prof.
Benjamin Iniguez,
URV
MOS-AK/GSA Asia/Pacific:
- Chair: Goichi
Yokomizo, STARC,
Japan
- Co-Chair: Sadayuki Yoshitomi, Toshiba, Japan
- Co-Chair: Xing Zhou, NTU, Singapore
|
