4th MOS-AK at LAEDC

Arbeitskreis Modellierung von Systemen und Parameterextraktion
Modeling of Systems and Parameter Extraction Working Group
4^th International MOS-AK/LAEDC Workshop
July 4-6 Cancun (MX)

MOS-AK: Enabling Compact Modeling R&D Exchange

Preannouncement and Call for Papers

Important Dates:	Call for Papers: Dec. 2021 2nd Announcement: April 2022 Final Workshop Program: June 2022 MOS-AK Workshop: July 4-6 2022, Cancun (MX)
Venue:	Hybrid/Online Event in Cancun (MX)
Online	registration to be open; any related enquiries can be sent to registration@mos-ak.org
Online	abstract submission to be open; any related enquiries can be sent to abstracts@mos-ak.org
	Synopsis and Workshop Topics
Synopsis:	HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models and its Verilog-A standardization. MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS/NEMS designs, CMOS/SOI and HEMT IC simulation. The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe, GaN, InP) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC/Bio/Med) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.
Topics:	to be covered include the following: Advances in semiconductor technologies and processing Compact Modeling (CM) of the electron devices Verilog-A language for CM standardization New CM techniques and extraction software Open Source FOSS TCAD/EDA modeling and simulation CM of passive, active, sensors and actuators Emerging Devices, CMOS and SOI-based memory cells Microwave, mmW, RF device modeling, high voltage device modeling Microsystems, SoC, IP modeling Device level modeling for Bio/Med applications Nanoscale semiconductor devices/circuits and its reliability/ageing Technology R&D, DFY, DFT and IC Designs Foundry/Fabless Interface Strategies

International MOS-AK Compact Modeling Committee

	IEEE Membership
International R&D Advisory Board
Larry Nagel, Omega Enterprises Consulting (USA)	Fellow Member
Andrei Vladimirescu, UCB (USA); ISEP (FR)	Fellow Member
MOS-AK Compact Modeling TPC Chair
Wladek Grabinski, MOS-AK (EU)	Senior Member
North America TPC:
Pekka Ojala, Exar (USA)
Geoffrey Coram, Analog Devices (USA)	Senior Member
Jamal Deen, U.McMaster (CAN)	Fellow Member
Roberto Tinti, Keysight EEsof Division (USA)
open
South America TPC:
Gilson I Wirth, UFRGS (BR)	Senior Memner
Sergio Bampi, UFRGS (BR)	Member
Antonio Cerdeira Altuzarra, Cinvestav-IPN (MX)	Senior Member
Roberto S. Murphy, INAOE (MX)	Senior Member
open
Europe TPC:
Ehrenfried Seebacher, ams AG (A)	.
Thomas Gneiting, AdMOS (D)
Benjamin Iniguez, URV (SP)	Fellow Member
Daniel Tomaszewski, IMiF Warsaw (PL)	Senior Member
open
Asia/Pacific TPC:
Sadayuki Yoshitomi, Kioxia (J)	Member
Rakesh Vaid, University of Jammu (IN)	Senior Member
Min Zhang, XMOD, Shanghai (CN)
Yuehang Xu, UESTC Chengdu (CN)
Kaikai Xu, UESTC Chengdu (CN)	Senior Member

No.#761

update: Dec. 2021 (rev. a)