sponsor lead
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MOS-Modelle und Parameterextraktion MOS Modeling and Parameter Extraction Working Group 1st International MOS-AK Meeting (co-located with the CMC Meeting and IEDM Conference) |
| Agenda: Saturday, 13 December 2008; The Westin St Francis Hotel in San Francisco | |
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sponsor lead
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| MOS-AK Meeting Program |
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| 9:00 | Workshop Opening: Wladek Grabinski | |||||
| 9:00-11:45 | Morning Session - Chair: Hisayo S. Momose; Toshiba | |||||
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Verilog-A is for Equation
Specification, not for Modeling Colin McAndrew1, Laurent Lemaitre1, Zoltan Huszka2, and Geoffrey Coram3; 1Freescale, 2AMS, 3Analog Devices |
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Developing and releasing compact
models using Verilog-A Marek Mierzwinski, Patrick O'Halloran, and Boris Troyanovsky; Tiburon Design Automation Santa Rosa, CA |
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PSP Family of Compact Models -
Overview and recent developments G. Gildenblat, W. Wu, X. Li, Z. Zhu, W. Yao, Q. Zhou, A. Dey and D. Gajanan (ASU) G.D.J. Smit, A. Scholten and D.B.M. Klaassen (NXP) |
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Modeling of Metal Gate / High-k
MOSFET Devices with PSP Joachim Assenmacher; Infineon Technologies and Jae-Eun Park, IBM |
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A complete stress modeling solution
for 32nm technology and beyond Albert Yanfeng Li1, Xisheng Zhang1, Riko Radojcic2, 1Accelicon Technologies, 2Qualcomm |
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| 11:45-12:00 | Late News Posters - Chair: Wladek Grabinski; GMC Suisse | |||||
| 12:00-13:00 | Lunch13:00-16:00 | Afternoon Session - Chair: Sebastian Schmidt; XFab | ||||
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The HiSIM family of compact models
for integrated devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara, U. Feldmann, and M. Miura-Mattausch; Hiroshima University |
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Asymmetric Double Gate MOSFET
Compact Model Henok Abebe1, Ellis Cumberbatch2, Hedley Morris2 and Vance Tyree1; 1University of Southern California, 2Claremont Graduate University |
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Sizing analog MOS circuits by means
of the gm/ID methodology and a compact model Paul Jespers; UC Louvain |
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A Practical Guide to Accurate
Broadband On-Wafer Calibration for RF Silicon Applications Andrej Rumiantsev; SUSS MicroTec |
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Using Large-Signal Measurements for
Transistor Characterization and Model Verification in a Device Modeling
Program Maciej Myslinski1, Giovanni Crupi2, Marc Vanden Bossche3, Dominique Schreurs1, and Bart Nauwelaers1; 1Katholieke Universiteit Leuven, Belgium, 2University of Messina, Italy, 3NMDG N.V. |
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| 16:00-17:00 | Panel Session - Chair: Ehrenfried Seebacher; austriamicrosystems | |||||
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| after 17:00 | Post MOS-AK Reception | |||||
| Art
Gallery NOMA 80 Maiden Lane San Francisco www.nomagallerysf.com |
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