| Agenda | ||
|
|
|
| Sponsor | ||
|
||
| Workshop Program | ||||||
|
||||||
| 9:00-10:20 | Morning Session | |||||
| Compact Modelling of LDMOS Devices A.C.T. Aarts, R. van der Hout*, R. van Langevelde*, A.J. Scholten*, M.B. Willemsen* and D.B.M. Klaassen*; Eindhoven University of Technology, *Philips Research Laboratories Eindhoven |
||||||
| An electro-thermal DMOS model validated on pulsed measurements Bart Desoete; AMI Semiconductor, Belgium |
||||||
| Robust Design of Smart Power Circuits - The Robuspic Project Christian Maier; Robert Bosch GmbH |
||||||
| 10:40-11:30 | Poster Session | |||||
| PSP Modeling Package in IC-CAP Thomas Gneiting; AdMOS GmbH Advanced Modeling Solutions |
||||||
| Thermal and Electrical Simulation of Smart Power Circuits by Network Analysis J. Teichmann, G. Täschner, F. Liebermann, W. Kraus, and C. Wallner, Atmel, Germany |
||||||
| New enhancements in ADMS and Spectre CMI XML scripts Sergey Sukharev; Cadence, Moscow |
||||||
| Parasitics Modeling in a 0.35um HV-Process A.Steinmair and E.Seebacher; austriamicrosystems AG, Austria |
||||||
| Optimizing Scribe Street RF Parameter Measurements Leonard Hayden, Cascade Microtech Inc, Beaverton, Oregon, USA Presenter: Anthony Lord |
||||||
| Ansoft Solutions for High Performance IC Design Capabilities and Performance Mary Tolikas, Alain Michel; Ansoft Corporation |
||||||
| UTMOST Modeling Software: HVMOS and LDMOS Chris Warwick; Silvaco |
||||||
| Transistor models without certification ... is it worthwhile? Erik Buelens and Marc Vanden Bossche; NMDG, Belgium |
||||||
| 11:30-12:30 | HV/LD MOS Panel Session | |||||
| HV/LD MOS Modeling: Status and Future Directions Moderators: Ehrenfried Seebacher and Marek Brzobohaty |
||||||
| 14:00-16:00 | Afternoon Session | |||||
| Modeling and analysis of RF LDMOS devices for reliability issues M. Gares1, M. A. Belaid1, H. Maanane1, M. Masmoudi1, J. Marcon1, K. Mourgues1, Ph. Eudeline2 1Rouen University (LEMI), France; 2THALES Air Defence, France |
||||||
| MOS Transistor Mismatch Modeling in a 0.35um HV-Process W. Posch and E.Seebacher; austriamicrosystems AG, Austria |
||||||
| Lumped element behavioural high voltage MOS model S.Schmidt; X-FAB |
||||||
| Extraction of a Scalable Electrical Model for a SOI RF-LDMOS Including Drain Drift Region Resistance Self-Heating Effects Lorenzo Labate, Roberto Stella, Paolo Villani, and Enrico Novarini; STMicroelectronics, Italy |
||||||
| Compact IGBT Modelling for System Simulation P.A. Mawby, A.T. Bryant, Univ. Warwick |
||||||
| 16:00 | End of the workshop | |||||
 |
|
|