| Register: |
Free on-line registration |
| Venue: |
The Faculty of
Engineering, Sapienza Universitą di Roma, Via Eudossiana 18, Rome
Recommended Hotels:
The
hotels at the link below have an agreement with "La Sapienza";
http://www.uniroma1.it/organizzazione/postaeservizi/servizipersonale/risorse/default.php
Hotel Palatino http://www.hotelpalatino.com/
Other hotels (a short list):
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| Agenda: |
- April 8 and 9, 2010
- Day #1
- Morning Plenary
Session
- Visiting Micron
Wafer Fab
- Day #2
|
| Important Dates: |
- 1st Announcement - Dec.
2009
- Call for Papers - Dec.
2009
- 2nd Announcement
- Feb. 2010
- Final Workshop Program -
March 2010
- MOS-AK/GSA Workshop
- April 8-9, 2010
|
| Synopsis: |
- HiTech forum to discuss
the frontiers of electron device modeling with emphasis on
simulation-aware models.
- MOS-AK/GSA
Meetings are organized with aims to strengthen a network and discussion
forum among experts in the field, enhance open platform for information
exchange related to compact/Spice modeling and Verilog-A
standardization,
bring people in the compact modeling field together, as well as obtain
feedback from technology developers, circuit designers, and CAD tool
vendors. The topics cover all important aspects of compact model
development, implementation, deployment and standardization within the
main theme - frontiers of the compact modeling for nm-scale MEMS
designs and CMOS/SOI circuit simulation.
- The
specific workshop goal will be to classify the most important
directions for the future development of the electron device models,
not limiting the discussion to compact models, but including physical,
analytical and numerical models, to clearly identify areas that need
further research and possible contact points between the different
modeling domains.
This workshop is designed for device process engineers (CMOS, SOI,
BiCMOS, SiGe) who are interested in device modeling; ICs designers
(RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as
device characterization, modeling and parameter extraction engineers.
The content will be beneficial for anyone who needs to learn what is
really behind the IC simulation in modern device models.
|
| Topics: |
to be covered include the
following:
- Compact Modeling (CM) of
the electron devices
- Verilog-A language for
CM standardization
- New CM techniques and
extraction software
- CM of passive, active,
sensors and actuators
- Emerging Devices, CMOS
and SOI-based memory cells
- Microwave, RF device
modeling, high voltage device modeling
- Nanoscale CMOS devices
and circuits
- Technology R&D,
DFY, DFT and IC Designs
- Foundry/Fabless
Interface Strategies
|
| On-line |
posters abstract submission only use electronic submission
form.
Selected best MOS-AK
papers will be published in a special issue of the Microelectronics
Journal |
| Speakers: |
- Tentative
list of the invited speakers:
- Asen
Asenov (Uni. Glasgow)
- Giorgio
Baccarani (Uni. Bologna)
- Giuseppe
Iannaccone (Uni. Pisa)
- Luca
Larcher (Uni. Modena-Reggio Emilia)
- Andrea
Marmiroli (Numonyx)
- Luca
Perniola (CEA-LETI)
|
| Committee: |
- Fernanda Irrera, Uni Roma; Technical Program Chair
- Fabrizio Famą, Micron Technology Italia; Technical
Program Co-Chair
- Marco Balucani, Uni
Roma; Technical
Program Co-Chair
- Paolo Nenzi, Uni
Roma; Organization Coordinator
Extended MOS-AK/GSA
Committee:
- Lisa Tafoya, Vice President, Global Semiconductor
Alliance (GSA)
- Chelsea Boone GSA; Senior Research Analyst
- Wladek Grabinski, GMC Suisse; MOS-AK/GSA Group
Manager
MOS-AK/GSA North America:
- Chair: Pekka Ojala, Exar Corporation
- Co-Chair: Geoffrey Coram, Analog Devices
- Co-Chair: Prof.
Jamal Deen,
U.McMaster
MOS-AK/GSA South America:
- Chair: Prof. Gilson I Wirth; UFRGS; Brazil
- Co-Chair: Prof. Carlos Galup-Montor, UFSC; Brazil
MOS-AK/GSA Europe:
- Chair: Ehrenfried Seebacher, austriamicrosystems AG
- Co-Chair: Sebastian Schmidt, XFab
- Co-Chair: Prof.
Benjamin Iniguez,
URV
MOS-AK/GSA Asia/Pacific:
- Chair: Goichi Yokomizo, STARC, Japan
- Co-Chair: Sadayuki Yoshitomi, Toshiba, Japan
- Co-Chair: Xing Zhou, NTU, Singapore
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