Arbeitskreis MOS-Modelle und Parameterextraktion
MOS Modeling and Parameter Extraction Working Group
MOS-AK/ESSDERC/ESSCIRC Workshop
Friday, 19 September 2008 at Edinburgh International Conference Centre (EICC)
Agenda: Friday, 19 September 2008 at Edinburgh International Conference Centre (EICC)
  • Morning Session
    • 9:00-11:30 Oral presentations
    • 10:00-10:30 (coffee break)
  • Poster Session
    • 11:30-12:00 Posters
    • 12:00-13:00 (lunch)
  • Afternoon Session
    • 13:00-16:00 Oral presentations
    • 14:30-15:00 (coffee break)
Sponsors of the MOS-AK Workshop
Accelicon Tanner EDA 
XFab
     media sponsor
     SUSS MicroTec
 Technical Program Promoters
EuroTraining FSA 
ijnm_wiley SSE
Workshop Program
Display Format: Citation Citation & Abstract
9:00 Workshop Opening:
9:00-11:30 Morning Session: Towards Nano Compact Modeling
Chair: Joachim Burghartz, IMS-Chips 
  Compact Model Challenges of 65nm RF-CMOS Technology
Sadayuki Yoshitomi; TOSHIBA
 MOS_AK Recommendation Aspects of High-Frequency Modeling of MOSFETs with EKV3
Matthias Bucher, Maria-Anna Chalkiadaki; TUC and Antonios Bazigos NTUA
  LDMOS Model Benchmark of State of the Art HV MOS Models
Kund Molnár, Biswanath Senapati, Werner Posch and Ehrenfried Seebacher; austriamicrosystems AG
 MOS_AK Recommendation Compact Modeling Techniques in Thin-Film SOI MOSFETs
Benjamin Ińiguez; URV and Denis Flandre; UCL
  High-level modelling and performance optimisation of mixed-technology energy harvester systems
Tom J Kazmierski, University of Southampton
MOS_AK RecommendationMOS-AK presentations recommended for further publication
11:30-12:00 Poster Session
Chair: W.Grabinski, GMC

12:00-13:00 Lunch:
13:00-16:00 Afternoon Tutorial Session: Compact Modeling and Transistor Level Optimization in Analog Designs
Chair: Peter Mole; Intersil
 Charge-Based MOS Transistor Modeling: The EKV Model for Low-Power and RF IC Design Charge-based Modeling of the MOS Transistor
Christian Enz; CSEM, EPFL
 Tradeoffs and Optimization in Analog CMOS Design Tradeoffs and Optimization in Analog CMOS Design
David M. Binkley; The University of North Carolina at Charlotte
16:00 End of the MOS-AK Workshop
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No.#13358
update: 30-Sept-08 (rev. b)
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