Abstract: 
MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS/NEMS designs, CMOS/SOI and HEMT IC simulation. The content will be beneficial for anyone who needs to learn what is really behind the FOSS CAD/EDA IC simulation in modern device models in Open Access PDKs.

Abstract: 
As the technology for Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) advances, so does their modeling. Currently, two industry-standard models in CMC, ASM-HEMT and MVSG_CMC, are widely used for GaN HEMTs and are continuously improving. The performance of GaN HEMTs is significantly affected by self-heating and trapping effects. Accurately modeling these effects can save a lot of cost in subsequent circuit designs. This session will provide effective strategies and methods for modeling these effects with precision.

Abstract: 
In this talk, we briefly describe new developments concerning the worldwide device model standardization undertaken by the Si2 Compact Model Coalition (CMC) for 2023. New efforts in the ESD realm culminated in the release of the first standard ESD diode model, as well as the formation of a new work group to investigate standardizing a model for predicting ESD behavior in MOSFETs. The CMC furthermore released 10 new models for the existing standards and released three versions of a Verilog linter program available publicly to improve model coding quality for all model developers worldwide. Progress continues in the Phase 1 standardization process for SiC and RTN models, with actual model packages of two SiC models and two RTN models in the hands of the CMC for inspection and evaluation. The CMC currently has 32 member companies, and is responsible for 20 official model standards.

Abstract: 
With the development of faster, reliable and proven silicon based technologies, it is now possible to integrate antennas on chip (AoC), even though the semiconductor substrate is not the most convenient one for antenna applications. Nevertheless, an important number of research groups worldwide have made considerable advances in this field. Among many of the aspects being worked upon, the compact modeling of antennas outspends. The aim is to have SPICE compatible models in order to simulate the complete circuit as one, and avoid having different simulations and sets of parameters for the circuit and the antenna. In this talk, I will present some of the aspects that the group at INAOE (Puebla, Mexico) has been tackling towards this end.

Abstract: 
The semiconductor industry has been evolving and innovating for the past 75 years, ever since the first semiconductor transistor was invented. This rapid growth is driven by the direct and proactive contribution of the FOSS CAD/EDA to the entire technology flow: from state-of-the-art semiconductor technologies, device level compact/SPICE modeling, its Verilog-A standardization to advanced IC designs for various HiTech applications. However, the semiconductor industry also faces many challenges in maintaining the growth of its workforce with skilled technicians and engineers. To address the increasing need for well-trained workers worldwide, we need to find innovative ways to attract skilled talent and strengthen the local semiconductor workforce ecosystem. The FOSS CAD/EDA tools with the recently available open access PDKs provide a new platform to connect IC design beginners, enthusiasts and experienced mentors to benefit from the collaboration opportunities enabled by the fast-growing open-source IC design movement. FOSS IC design collaboration is increasingly possible due to the rapid growth of open access PDKs recently offered by SkyWater, GF and IHP. This paper demonstrates the FOSS CAD/EDA contribution to the SPICE/Verilog-A modeling/standardization, compete IC design flow (Xschem, Qucs-S, ngspice, Xyce, OpenVAF, OpenEMS, Magic, kLayout, OpenRoad) as well as selected open source analog/RF and digital IC design examples.

Abstract: 
Since the launch of the Open Shuttle Run program by Google, SkyWater, and Efabless in 2020, we have witnessed a steady expansion of the open-source IC design ecosystem. There are now more than 5,500 users on the open-silicon Slack space and about 1,000 design projects have been initiated on Efabless€™ project portal. Given this strong momentum, it is interesting to ask questions about where this movement will ultimately take us. To what extent will the open-source approach help us overcome the classical analog issues of limited re-use and design automation? Will AI play a role in the foreseeable future? In this talk, I will share a few personal observations and opinions to stimulate further discussion.

Abstract: 
Our presentation starts with an overview of the Si, GaN and SiC technologies for power FET devices. We then review the various approaches to the SPICE modeling of these devices, including compact models and macromodels. Next, we consider the SPICE model parameter extraction particularities of power FETs, including addressing their specific bias-dependent capacitances, and the SPICE model tuning based on dynamic characteristics. We also examine the advantages of using TCAD for developing proper, physical SPICE macromodels and associated parameter extraction methodologies. For illustration purpose, several TCAD-based model extraction examples for power Si, GaN and SiC FETs are presented.

Abstract: 
Neural compact modeling has been considered as a data-based approach. It has demonstrated proven accuracy and automation capability with the provided data points, but it suffers from a lack of physical behavior in unobserved operational regions. In contrast, for equation-based models, individuals typically develop sets of physics-based equations first and then extract parameters to fit the measured data. Inspired by this process, we have designed a foundation model based on transformer architecture to understand generic device physics. This model can be applied to various downstream tasks, including compact model generation with limited measured data (including no-shot CV prediction), model re-centering, or virtual measured data generation.

Abstract: 
In this talk, Quantum computing is expected to change the world by providing exponential speed-up in solving some very difficult problems. In this talk, we will first discuss the fundamental principles of quantum computing algorithms. Error correction, which is essential to realize a fault-tolerant quantum computer, will be briefly covered. Then, using the superconductor-based quantum computer as an example, we will study how to implement the essential operations in quantum computers. We then show how to use a quantum computer to accelerate simulation through the HHL algorithm and Quantum Variational Liner Solver. Finally, we will discuss how to simulate a readout signal in a superconducting qubit quantum computer.

Abstract: 
The brain is the perfect place to look for inspiration to develop more efficient neural networks. One of the main differences with modern deep learning is that the brain encodes and processes information as spikes rather than continuous, high-precision activations. This presentation will dive into how the open-source ecosystem has been used to develop brain- inspired neuromorphic accelerators, from our development of a Python training library for spiking neural networks (snnTorch, >100,000 downloads), to compiling these next-generation deep learning models on custom ASICs submitted for tape-out in the Sky130 process. The open- source silicon movement has the potential to impact how we adopt principles from neuroscience to improving deep learning and hardware acceleration.

Abstract: 
TBD